Unbiased Rounding for HUB Floating-Point Addition
نویسندگان
چکیده
منابع مشابه
A floating point multiplier performing IEEE rounding and addition in parallel
This work was one of ASIC basis technology project mainly managed by IDEC and supported by the ministry of trade, industry & energy and the ministry of science and technology of korea. Abstract In the conventional oating point multipliers, the rounding stage is usually constructed by using a high speed adder for the increment operation, increasing the overall execution time and occupying a larg...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computers
سال: 2018
ISSN: 0018-9340,1557-9956,2326-3814
DOI: 10.1109/tc.2018.2807429